Module | Macro | Sub | Setting | Status |
Clock Generator | Used | |||
CGC | Used | |||
PIOR00 / TI00 | P17 | |||
PIOR01 / TI01 | P30 | |||
PIOR02 / TI02 | P16 | |||
PIOR03 / TI03 | P125 | |||
PIOR04 / TI04 | P13 | |||
PIOR05 / TI05 | P15 | |||
PIOR06 / TI06 | P14 | |||
PIOR07 / TI07 | P120 | |||
PIOR10 / TO00 | P17 | |||
PIOR11 / TO01 | P30 | |||
PIOR12 / TO02 | P16 | |||
PIOR13 / TO03 | P125 | |||
PIOR14 / TO04 | P13 | |||
PIOR15 / TO05 | P15 | |||
PIOR16 / TO06 | P14 | |||
PIOR17 / TO07 | P120 | |||
PIOR40 / RXD0/SI00/SDA00 | P16 | |||
PIOR40 / TXD0/SO00 | P15 | |||
PIOR40 / _SCK00/SCL00 | P17 | |||
PIOR40 / _SSI00 | P30 | |||
PIOR41 / SO01 | P120 | |||
PIOR41 / SI01 | P13 | |||
PIOR41 / _SCK01 | P14 | |||
PIOR41 / _SSI01 | P125 | |||
PIOR41 / SCL01 | P14 | |||
PIOR41 / SDA01 | P13 | |||
PIOR42 / RXD1 | P11 | |||
PIOR42 / TXD1 | P12 | |||
PIOR42 / SO10 | P12 | |||
PIOR42 / SI10 | P11 | |||
PIOR42 / _SCK10 | P10 | |||
PIOR42 / SCL10 | P10 | |||
PIOR42 / SDA10 | P11 | |||
PIOR43 / SO11 | P72 | |||
PIOR43 / SI11 | P70 | |||
PIOR43 / _SCK11 | P71 | |||
PIOR43 / _SSI11 | P73 | |||
PIOR43 / SCL11 | P71 | |||
PIOR43 / SDA11 | P70 | |||
PIOR44 / LTxD0 | P13 | |||
PIOR44 / LRxD0 | P14 | |||
PIOR46 / CTxD0 | P10 | |||
PIOR46 / CRxD0 | P11 | |||
PIOR50 / KR0 | P70 | |||
PIOR50 / KR1 | P71 | |||
PIOR50 / KR2 | P72 | |||
PIOR50 / KR3 | P73 | |||
PIOR50 / KR4 | - | |||
PIOR50 / KR5 | - | |||
PIOR50 / KR6 | - | |||
PIOR50 / KR7 | - | |||
PIOR52 / INTP2 | P30 | |||
PIOR53 / INTP3 | P17 | |||
PIOR70 / TRDCLK0/TRDIOA0 | P13 | |||
PIOR71 / TRDIOB0 | P125 | |||
PIOR73 / TRDIOD0 | P120 | |||
Operation mode setting | High speed main mode 4.0 (V) ¡Ü VDD ¡Ü 5.5 (V) | |||
Main system clock (fMAIN) setting | High-speed system clock (fMX) | |||
fIH operation | Unused | |||
fMX operation | Used | |||
High-speed system clock setting | X1 oscillation (fX) | |||
fMX frequency | 8(MHz) | |||
Stable time | 128 (2^10/fX)(¦Ìs) | |||
fPLL operation | Used | |||
fPLL frequency | 64(MHz) | |||
Lockup wait counter | 64 (2^9/fMAIN)(¦Ìs) | |||
PLL output for main system clock (fMP) setting | 64 (fPLL)(MHz) | |||
fSUB operation | Unused | |||
Internal low-speed oscillation clock (fIL) setting | 15(kHz) | |||
Low speed on-chip oscillator clock (fSL) setting | 15 (fIL)(kHz) | |||
WDT operation clock (fWDT) setting | 15(kHz) | |||
RTC operation clock | 32.79 (fMX/244)(kHz) | |||
Timer RD operation clock | 64000 (fPLL)(kHz) | |||
CPU and peripheral clock (fCLK) | 32000 (fMP/2)(kHz) | |||
On-chip debug operation setting | Unused | |||
Security ID setting | Used | |||
Security ID | 0x00000000000000000000 | |||
Output the function for confirming reset source | Used | |||
RESOUT pin setting | P130 used as port pin | |||
Illegal memory access detection function setting | Unused | |||
RAM guard function setting | Unused | |||
Port register guard function setting | Unused | |||
Interrupt register guard function setting | Unused | |||
Chip state control register guard function setting | Unused | |||
Detection of 1 bit error detection interrupt (INTRAM) | Unused | |||
CPU stack pointer monitor function setting | Unused | |||
Clock monitor function setting | Unused | |||
Data flash access control setting | Disables data flash access | |||
Setting of data flash library | Unused | |||
Port | Used | |||
PORT | Used | |||
P31 | ||||
Mode | Out | |||
output value | 0 | |||
P84 | ||||
Mode | Out | |||
output value | 0 | |||
P85 | ||||
Mode | Out | |||
output value | 0 | |||
Interrupt | Unused | |||
Serial | Used | |||
SAU0 | Used | |||
Channel0 | ||||
Channel 0 | UART0(Transmit/receive function) | |||
Data length setting (Receive function) | 8 bits | |||
Transfer direction setting (Receive function) | LSB | |||
Parity setting (Receive function) | None | |||
Stop bit length setting (Receive function) | 1 bit fixed | |||
Receive data level setting | Normal | |||
Transfer rate setting (Receive function) | 115200(bps)(Current error: +0.64% the minimum is -5.12% the maximum is +5.10%) | |||
Reception end interrupt priority (INTSR0) | Level 1 | |||
Reception end (Callback function setting) | Used | |||
Reception error (Callback function setting) | Used | |||
Transfer mode setting | Continuous transfer mode | |||
Data length setting (Transmit function) | 8 bits | |||
Transfer direction setting (Transmit function) | LSB | |||
Parity setting (Transmit function) | None | |||
Stop bit length setting (Transmit function) | 1 bit | |||
Transmit data level setting | Normal | |||
Transfer rate setting (Transmit function) | 115200(bps)(Current error: +0.64%) | |||
Transmit end interrupt priority (INTST0) | Level 1 | |||
Transmission end (Callback function setting) | Used | |||
SAU1 | Unused | |||
IICA0 | Unused | |||
A/D Converter | Unused | |||
Timer | Used | |||
TAU0 | Used | |||
Channel0 | ||||
Channel 0 | Interval timer | |||
Interval value (16 bits) | 1ms, (Actual value: 1) | |||
Generates INTTM00 when counting is started | Unused | |||
End of timer channel 0 count, generate an interrupt (INTTM00) | Used | |||
Priority (INTTM00) | Level 2 | |||
TAU1 | Unused | |||
TMRJ0 | Unused | |||
TMRD0 | Unused | |||
TMRD1 | Unused | |||
Watchdog Timer | Unused | |||
Real-time Clock | Unused | |||
Data Transfer Controller | Unused | |||
Clock Output/Buzzer Output | Unused | |||
Voltage Detector | Unused |